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ThinkMind // International Journal On Advances in Systems and Measurements, volume 6, numbers 1 and 2, 2013 // View article sysmea_v6_n12_2013_17


An FPGA Implementation of OFDM Transceiver for LTE Applications

Authors:
Tiago Pereira
Manuel Violas
João Lourenço
Atílio Gameiro
Adão Silva
Carlos Ribeiro

Keywords: Software Defined Radio; OFDM; FPGA; time-domain synchronizatio; least square channel estimation

Abstract:
The paper presents a real-time transceiver using an Orthogonal Frequency-Division Multiplexing (OFDM) signaling scheme. The transceiver is implemented on a Field-Programmable Gate Array (FPGA) through Xilinx System Generator for DSP and includes all the blocks needed for the transmission path of OFDM. The transmitter frame can be reconfigured for different pilot and data schemes. In the receiver, time-domain synchronization is achieved through a joint maximum likelihood (ML) symbol arrival-time and carrier frequency offset (CFO) estimator through the redundant information contained in the cyclic prefix (CP). A least-squares channel estimation retrieves the channel state information and a simple zero-forcing scheme has been implemented for channel equalization. Results show that a rough implementation of the signal path can be implemented by using only Xilinx System Generator for DSP

Pages: 224 to 234

Copyright: Copyright (c) to authors, 2013. Used with permission.

Publication date: June 30, 2013

Published in: journal

ISSN: 1942-261x

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