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ThinkMind // SIMUL 2012, The Fourth International Conference on Advances in System Simulation // View article simul_2012_5_20_50041


A Flexible Analytic Model for the Design Space Exploration of Many-Core Network-on-Chips Based on Queueing Theory

Authors:
Erik Fischer
Albrecht Fehske
Gerhard P. Fettweis

Keywords: network-on-chip; noc; queueing theory; analytic model

Abstract:
A continuing technology scaling and the increasing requirements of modern embedded applications are most likely forcing a current multi-processor system-on-chip design to scale to a many-core system-on-chip with thousands of cores on a single chip. Network-on-chip emerged as flexible and high-performance solution for the interconnection problem. There will be an urgent need for fast, flexible and accurate simulation models to guide the design process of many-core system-on-chip. In this paper, we introduce a novel analytic approach for modeling on-chip networks to fulfill these requirements. The model is based on queueing theory and very flexible in terms of supported topology, routing scheme and traffic pattern. The approach overcomes the limitations of the mean value analysis introduced in the existing work. Instead, it provides information about a steady-state distribution of the network routers. This allows to dimension network resources, such as buffers, links, etc. We show the high accuracy of the model by comparison with a cycle-accurate simulation. The model is able to estimate the mean network latency with an accuracy of about 3%.

Pages: 119 to 124

Copyright: Copyright (c) IARIA, 2012

Publication date: November 18, 2012

Published in: conference

ISSN: 2308-4537

ISBN: 978-1-61208-234-9

Location: Lisbon, Portugal

Dates: from November 18, 2012 to November 23, 2012

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